NASA SBIR 2010 Solicitation
FORM B - PROPOSAL SUMMARY
||Command, Data Handling, and Electronics
||Technologies Enabling Custom Radiation-Hardened Component Development
SMALL BUSINESS CONCERN (Firm Name, Mail Address, City/State/Zip, Phone)
Microelectronics Research Development Corporation
4775 Centennial Blvd, Suite 130
Colorado Springs, CO 80919 - 3332
PRINCIPAL INVESTIGATOR/PROJECT MANAGER (Name, E-mail, Mail Address, City/State/Zip, Phone)
Xiaoyin (Mark) Yao
8102 Menaul Blvd Suite B
Albuquerque, NM 87110 - 4725
(505) 294-1962 Extension :24
Estimated Technology Readiness Level (TRL) at beginning and end of contract:
TECHNICAL ABSTRACT (Limit 2000 characters, approximately 200 words)
Two primary paths are available for the creation of a Rad-Hard ASIC. The first approach is to use a radiation hardened process such as existing Rad-Hard foundries. These foundries use special processing steps to decrease the total ionizing dose issues, but do not reduce the single event effects. The second approach is to use a special standard cell library containing hardening techniques that can be built on a standard state-of-the-art commercial foundry. This cell library must compensate for the unhardened foundry by using special layout techniques to retain the ability to operate through the total ionizing dose experienced in the radiation environments. These techniques are generally referred to as radiation hardened-by-design layout techniques (RHBD). For hardening of the circuit architectures against upsets from the single event effects, both the commercial and the Rad-Hard foundries must incorporate some type of mitigation scheme requiring special transistor interconnects or redundant nodes. This program will fill this void, providing the space community with the ability to easily acquire the RHBD Micro-RDC standard cell libraries for use with commercial ASIC design flows. The library will include a full suite of IO pads designed by Micro-RDC and successfully implemented in test chip designs at 90nm and 65nm. Finally, a portion of the custom via programmable structured ASIC fabric designed by Micro-RDC and Viasic will be made available to the library users. This fabric can be embedded into a design which can be modified and reprogrammed by generating just via 3 mask layer, which can lead to a substantial cost savings over a complete new ASIC design. This program will allow Micro-RDC to transform its custom libraries into synthesis libraries, and enable other companies the opportunity to use a proven and fully characterized RHBD ASIC cell library and suite of Mega Cell hard IP for rapidly developing spaceborne systems.
POTENTIAL NASA COMMERCIAL APPLICATIONS (Limit 1500 characters, approximately 150 words)
The RHBD library, IP cores and Structured ASIC blocks enables a simplified, fast, reliable and qualifiable method to develop integrated circuits for use in harsh radiation environments. Through successful completion of this SBIR Phase I and II program system integrators will not be required to re-qualify IC designs for space applications. Our proposed design flow will be radiation hardened to greater than 3Mrad while replicating a commercial design flow. A user of this flow will be able to focus on the component function and speed requirements, as well as other critical performance functionality, without regard to developing radiation hardening methods. The radiation hardness is ensured by using the library, IP cores and Structured ASIC blocks, which have been previously demonstrated through our successful completion of our radiation hard SASIC developed under AFRL. This design flow will be broadly applicable for aerospace system designers offering a low cost short term solution for NASA programs. An example application for program developed technology of Phase I and Phase II would be the NASA Europa Jupiter System Mission, in which all electronic devices need to have a dose tolerance of 3Mrad (Si) for deep space exploration.
POTENTIAL NON-NASA COMMERCIAL APPLICATIONS (Limit 1500 characters, approximately 150 words)
Since IP cores including USB, I2C, and SpaceWire can be used directly in "Space Plug-and-Play Avionics" (SPA), the result of this project can also be used by the Air Force to develop SPA devices at a low cost within a short time greatly leveraging program developed technology to other military applications. The RHBD standard cell library licensed by Micro-RDC to commercial and non-commercial customers will enable denser higher speed and lower power solutions than a purely Structured ASIC approach. We will provide IP use licenses to the foundry's and work with the product designers to implement the technology through support contracts if needed. Our ultimate goal would be to create a standard product line of components for partnering with a major product distributor (we have already had preliminary discussions with Areoflex, BAE and Cypress to offer such a line on a non-exclusive basis) to keep costs low. However, organizations needing specialty parts will find the licensing approach beneficial for low-volume applications which will be met with a simple fee for each silicon run.
TECHNOLOGY TAXONOMY MAPPING (NASA's technology taxonomy has been developed by the SBIR-STTR program to disseminate awareness of proposed and awarded R/R&D in the agency. It is a listing of over 100 technologies, sorted into broad categories, of interest to NASA.)
Circuits (including ICs; for specific applications, see e.g., Communications, Networking & Signal Transport; Control & Monitoring, Sensors)
Form Generated on 09-03-10 12:12